ZXSTZ80REGS

Contains the Z80 registers and other internal state values. It does not contain any specific model registers.

#define ZXSTZF_SUPPRESS_INTS 1
#define ZXSTZF_HALTED        2
#define ZXSTZF_FSET          4

typedef struct _tagZXSTZ80REGS
{
  ZXSTBLOCK blk;
  WORD AF, BC, DE, HL;
  WORD AF1, BC1, DE1, HL1;
  WORD IX, IY, SP, PC;
  BYTE I;
  BYTE R;
  BYTE IFF1, IFF2;
  BYTE IM;
  DWORD dwCyclesStart;
  BYTE chHoldIntReqCycles;
  BYTE chFlags;
  WORD wMemPtr;
} ZXSTZ80REGS, *LPZXSTZ80REGS;

Members

blk

The block header. The block id is ZXSTBID_Z80REGS ('Z', '8', '0', 'R').

AF

The contents of the AF register pair

BC

The contents of the BC register pair

DE

The contents of the DE register pair

HL

The contents of the HL register pair

AF1

The contents of the AF' register pair

BC1

The contents of the BC' register pair

DE1

The contents of the DE' register pair

HL1

The contents of the HL' register pair

IX

The contents of the IX register pair

IY

The contents of the IY register pair

SP

The contents of the stack pointer, SP

PC

The current value of the program counter, PC

I

The contents of the I register

R

The contents of the R register

IFF1

The value of Interrupt Flip Flop 1 (IFF1). This is guaranteed to be either 0 or 1.

IFF2

The value of Interrupt Flip Flop 2 (IFF2). This is guaranteed to be either 0 or 1.

IM

The current Z80 interrupt mode. This can be 0, 1 or 2.

dwCyclesStart

The t-states value at the time the snapshot was made. This counts up from zero to the maximum number of t-states per frame for the specific Spectrum model.

chHoldIntReqCycles

The number of t-states left on restart when an interrupt can occur. This is used to support interrupt re-triggering properly. On the Spectrum, the ULA holds the INTREQ line of the Z80 low for up to 48 t-states (depending on the model). If interrupts are enabled during this time, the Z80 will accept the request and invoke the appropriate interrupt service routine.

The AMX mouse also asserts the INTREQ line when it needs attention. It is therefore possible for this member to be non-zero even if the t-state counter suggests we are not at the beginning of a frame.

chFlags

Various flags indicating the internal state of the CPU. This can be a combination of:

Flag	Meaning
ZXSTZF_SUPPRESS_INTS	Interrupts are currently not being accepted. The last instruction executed was an EI instruction, an invalid $DD or $FD prefix or sequence of them.
ZXSTZF_HALTED	The last instruction executed was a HALT instruction. The CPU is currently executing NOPs and will continue to do so until the next interrupt occurs. This flag is mutually exclusive with ZXSTZF_SUPPRESS_INT.
ZXSTZF_FSET	Set if the last instruction executed set the flags (F Register), reset otherwise.

wMemPtr

Internal Z80 register used to generate bits 5 and 3 of the F register after executing a BIT x,(HL) instruction. Set to 0 (zero) if not supported.

Revision history

Available since version 1.0.

The chFlags, chBitReg and chReserved members were added in version 1.1. The size of the block is unchanged.

The wMemPtr member was added in version 1.4. It replaces the chBitReg and chReserved members. The size of the block is unchanged.

The ZXSTZF_FSET flag was added in version 1.5.

The ZXSTZF_EILAST flag was renamed to ZXSTZF_SUPPRESS_INT in version 1.5 to better reflect its purpose.